Energy-Aware Pruning: Designing Energy-Efficient Convolutional Neural Networks.Part 3: Application of efficient DNNs on a wide range of image processing and computer vision tasks (e.g., image classification, depth estimation, image segmentation, super-resolution).Part 2: Co-design algorithms and hardware for efficient DNNs (e.g., precision, sparsity, network architecture design, network architecture search, designing networks with hardware in the loop).Part 1: Hardware Platforms for DNNs (e.g., CPU, GPU, FPGA, ASIC) and metrics for evaluating the efficiency of DNNs.We will also discuss how these techniques can be applied to different image processing and computer vision tasks.
We will then describe recent techniques that reduce the computation cost of DNNs from both the hardware architecture and network algorithm perspective. In this tutorial, we will provide a brief overview of DNNs, the various hardware platforms that support DNNs including CPU, GPU, FPGA and ASICs, and highlight important benchmarking/comparison metrics and design considerations. Accordingly, designing efficient algorithms for deep neural networks is an important step towards enabling the wide deployment of DNNs in image processing and computer vision systems (e.g., autonomous vehicles, drones, robots, smartphones, wearables, Internet of Things, etc). WhileĭNNs delivers best-in-class accuracy and quality of results, it comes at the cost of high computational complexity. This tutorial describes methods to enable efficient processing for deep neural networks (DNNs), which is the cornerstone of many state-of-the-art image processing and computer vision algorithms.
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